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VHDL Datapath Synthesis

5-6 VHDL Reference Manual

COMPARE

The COMPARE macrofunction will be inferred from the use of any of the

following relational operators: <, <, >=, <=, =, /=. A COMPARE will

only be inferred when both of the operands are not constant values.

The following code will infer three COMPAREs:

p0: process (a, b, my_state)

begin

c <= '0';

case (my_state) is

when "00" =>

if (a = b) then

c <= '1';

end if;

when "01" =>

if (a /= b) then

c <= '1';

end if;

when others =>

if (a > b) then

c <= '1';

end if;

end case;

end process;

Note that the VHDL synthesis compiler will only infer COMPARE

macrofunctions with a single output (this is the least common

denominator). Some targets (such as Altera) support COMPARE

functions with multiple outputs. In these cases it may be more efficient

to instantiate a single G_COMPARE directly, rather than letting the

synthesis compiler infer multiple COMPAREs. See the section on

instantiation for more details.

MULT

The MULT macrofunction will be inferred from any use of the *

operator where both operands are not constant. For example:

z <= a * b;

process(clk)

begin

if (rising_edge(clk)) then

iq <= i * q;

end if;

end process;

The only difference in these two examples is that in the second case

the outputs of the MULT will be registered.

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